1. Technical Field
The invention relates generally to semiconductor devices and more specifically to a freestanding semiconductor layer formed on a semiconductor device.
2. Related Art
In CMOS technologies, such as in the design and fabrication of field effect transistors (FETs), integrated circuit density has grown and continues to increase at a significant rate. To facilitate the increase in device density, new methods are constantly needed to allow the feature size of these semiconductor devices to be reduced.
Fin FET is currently considered a leading candidate for CMOS technology beyond the 65 nanometer (nm) range. Methods to produce fins, also known as freestanding semiconductor layers, for FinFETs have generally centered around using some form of a mask or etch stop, either e-beam, conventional lithography, or sidewall-image transfer, with which to etch thin silicon freestanding semiconductor layers from a silicon-on-insulator (SOI) or bulk-substrate silicon crystal. The traditional material used for forming a freestanding semiconductor layer and the masking process thereof may be expensive and may still not be accurate enough to provide a uniformity of thickness of the freestanding semiconductor layer, which is important in fabricating an FET with dependable and accurate performance.
Thus, a challenge of this technology is to provide a very thin silicon freestanding semiconductor layer with a high degree of control of the thickness thereof. Another challenge is to maintain uniformity of thickness from the top to the bottom of the freestanding semiconductor layer. Furthermore, a challenge of this technology is to provide for a precise and inexpensive method of forming a thin, uniform freestanding semiconductor layer on conventional SOI or bulk-substrate silicon devices.
Accordingly, a need has developed in the art for a method of forming a freestanding semiconductor layer on a conventional SOI or bulk-substrate silicon device that will provide a high degree of control of the thickness and height thereof and maintain uniformity of thickness from the top to the bottom of the freestanding semiconductor layer.